Competencies and objectives

 

Course context for academic year 2025-26

The subject Computer Architecture is part of the knowledge belonging to the area known as Computer Architecture and Technologies, a field that explains, among other aspects, the functioning of computers as computing machines.

This course is one of the main subjects related to the study of computer architecture and, together with Computer Fundamentals, completes the theory, abstraction and design aspects of the area.

On the other hand, the course acts as a bridge, introducing advanced architectures whose contents will be consolidated in the second year course High Performance Computing.

Its location and characterization as mandatory in the syllabus make it a course that establishes the foundations of computer organization and addresses issues related to design, evaluation and strategies to increase performance, while it serves as a basis for the accomplishment of these objectives in the course High Performance Computing.

 

 

Course competencies (verified by ANECA in official undergraduate and Master’s degrees) for academic year 2025-26

Transversal Competences

  • CT01 : Utilizar de forma habitual las herramientas informáticas, así como las tecnologías de la información y las comunicaciones, en todo su desempeño profesional.
  • CT02 : Comunicar de forma oral y escrita transmitiendo información, ideas, problemas y soluciones a un público tanto especializado como no especializado.

 

General Competences

  • CG2 : Conocer, seleccionar y aplicar métodos de los diferentes campos de la inteligencia artificial para la resolución de problemas de ingeniería.
  • CG4 : Obtener soluciones eficientes, óptimas y/o probables aplicando los principios propios de la ingeniería y el método científico, describiendo de forma adecuada el problema y realizando una evaluación sólida de la propuesta.

 

Specific Competences

  • CE12 : Describir los principios fundamentales y técnicas básicas de las arquitecturas paralelas y evaluarlas para la resolución de problemas propios de la inteligencia artificial.
  • CE13 : Describir los principios fundamentales y técnicas básicas de la programación paralela, concurrente, distribuida y de tiempo real y aplicarlos al desarrollo de sistemas de inteligencia artificial

 

Basic Competences

  • CB2 : Que los estudiantes sepan aplicar sus conocimientos a su trabajo o vocación de una forma profesional y posean las competencias que suelen demostrarse por medio de la elaboración y defensa de argumentos y la resolución de problemas dentro de su área de estudio

 

 

 

Learning outcomes (Training objectives)

1. Definir el concepto de arquitectura y clasificar los modelos de arquitecturas paralelas.

2. Conocer los parámetros para la evaluación y el análisis del rendimiento de computadores.

3. Explicar la repercusión del repertorio de instrucciones sobre la arquitectura y el rendimiento, entendiendo los principios del diseño de dicho repertorio y las diferencias de arquitecturas RISC y CISC.

4. Identificar el paralelismo a nivel de instrucción (ILP) como técnica básica para el aumento del rendimiento, así como el diseño, la planificación y el control de unidades segmentadas y superescalares.

5. Explicar las técnicas de mejora del rendimiento de la memoria y del sistema de entrada/salida.

6. Desarrollar habilidades de diseño de repertorios de instrucciones, así como su utilización efectiva para la mejora del rendimiento.

 

 

 

Specific objectives stated by the academic staff for academic year 2025-26

The general objective of this course aims that students know and strengthen key aspects of the analysis, design and implementation of classical sequential architectures, the immediate improvements within this classical paradigm, as well as the existence of alternative architectures. As a basic working method, a set of tools and settings are established to allow students to study and analyse ingreater depth and rigor different architectural options, combining abstract and generic aspects with the study of specific implementations.

The specific objectives are specified in the following:

Cognitive objectives

  • Define the concept of architecture and incorporate parameters to evaluate and analyze performance.
  • Explain the impact of the ISA on architecture and performance, understanding the principles of ISA design.
  • Identify pipelining as a basic technique for increasing CPU performance, as well as design, planning and control of pipeline units
  • Understanding the evolution of the architectures and the differences between the CISC and RISC approaches.
  • Explain techniques for improving the performance of memory and input/output system
  • Recognize the limitations of classical architectures and the importance of parallelism
  • Correctly use the usual terminology and language of the subject both orally and in writing

Skills

  • Develop design skills of instruction sets
  • Know how to design a pipelined datapath
  • Understand the potential of a hierarchical memory system
  • To acquire skills in the application of theoretical knowledge

Attitudinal

  • Appreciate the importance of optimizing of various components of the computer architecture to improve performance
  • Develop a critical thinking when evaluating the performance of a computer system according to objective criteria

 

 

General

Code: 33657
Lecturer responsible:
Rico Soliveres, María Luisa
Credits ECTS: 6,00
Theoretical credits: 1,20
Practical credits: 1,20
Distance-base hours: 3,60

Departments involved

  • Dept: INFORMATION TECHNOLOGY AND COMPUTING
    Area: COMPUTER ARCHITECTURE
    Theoretical credits: 1,2
    Practical credits: 1,2
    This Dept. is responsible for the course.
    This Dept. is responsible for the final mark record.

Study programmes where this course is taught